We use cookies. Find out more about it here. By continuing to browse this site you are agreeing to our use of cookies.
#alert
Back to search results
New

Principal Circuit Design Engineer

Microsoft
United States, Texas, Austin
Nov 27, 2024
OverviewMicrosoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft's expanding Cloud Infrastructure and responsible for powering Microsoft's "Intelligent Cloud" mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for passionate engineers to help achieve that mission. As Microsoft's cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time, in high volume with high quality and lowest cost is of paramount importance. To achieve this goal, the Semi and Custom IP team is instrumental in defining and delivering operational measures of success for hardware manufacturing, improving the planning process, quality, delivery, scale and sustainability related to Microsoft cloud hardware. We are looking for a Principal Circuit Design Engineer to design and build customer-focused solutions, discover insights and utilize industry knowledge to envision and implement future technical solutions that will manage and optimize the Cloud infrastructure.
ResponsibilitiesCollaborate with SoC designers to develop Memory SRAM and Register file solutions to difficult PPA challenges Work with internal and external process technology teams to understand and exploit advanced process DTCO knobs Serve as technical lead to a team of circuit and mask layout engineers Devise methodologies for statistical analysis and timing/power/EMIR characterization Work alongside IP and SoC program management to develop milestone schedules and ensure proper delivery Direct IP collateral quality assurance checking Develop IP and post-silicon characterization plans for inclusion on advanced process technology testchips Develop scripting automation for flows Embody our Culture and Values
Applied = 0

(web-5584d87848-llzd8)